Conventionally, with the miniaturization, thickness reduction and performance enhancement of electronic apparatus, mounting structures in which a semiconductor chip is flip-chip-connected to a mounting board have come to be employed widely. For example, the solder bumps of a semiconductor chip may be flip-chip-connected to the connection electrodes of a mounting board, and the space under the semiconductor chip may be filled with underfill resin. Further, the semiconductor chip may be flip-chip-connected to an interposer, and the interposer may be connected to the mounting board. For example, JP-2005-064467-A is related to such technique.
The thermal expansion coefficient of such semiconductor chip (made of silicon) is much different from that of such mounting board (made of a glass epoxy resin). Therefore, in a heating process for mounting the semiconductor chip, residual stress tends to be concentrated at the joining portions due to thermal stress.
As a result, a joining portion of the semiconductor chip and the mounting board or elements of the semiconductor chip may be broken, that is, the reliability of the electrical connections is insufficient. A similar problem arises also when the semiconductor chip is connected to the mounting board via the interposer of silicon.